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ISL97636
TABLE 1. PROTECTIONS TABLE (Continued)
DETECTION
VOUT
CASE
6
FAILURE MODE
CH0 LED Open
MODE
Upper OTP
FAILED CHANNEL ACTION
CH0 goes off until chip cooled and
GOOD CHANNELS ACTION
Same as CH0
REGULATED BY
VF of CH0
Circuit but has
paralleled Zener
triggered but
VIIN0 < VSC
then comes back on with current
reduced to 76%. Further OTP
triggers result in reduction to 53%,
then 30%.
7
CH0 LED Open
Upper OTP not
CH0 OFF
CH1 through CH7 Normal
Highest VF of CH1
Circuit but has
paralleled Zener
triggered but
VIIN0 > VSC
through CH7
Upper OTP not
CH0 remains ON and has highest
VOUT increases then CH-X
VF of CH0
triggered but VIINx VF, thus VOUT increases.
> VSC
switches OFF. This is an unwanted
shut off and the effect can be
minimized by setting OVP at an
appropriate level.
8
Channel-to-Channel Lower OTP
Any channel at below 50% of the target current will fault out after 400μs.
Highest VF of CH0
Δ VF too high
triggered but VIINx Remaining channels driven with normal current.
< VSC
through CH7
9
Channel-to-Channel Upper OTP
All channels switched off until chip cooled and then comes back on with
Highest VF of CH0
Δ VF too high
triggered but VIINx current reduced to 76%. Further OTP triggers result in reduction to 53%, through CH7
< VSC
then 30%.
10
Output LED stack
voltage too high
VOUT > VOVP
Driven with normal current. Any channel that is below 50% of the target
current will time-out after 6ms.
Highest VF of CH0
through CH7
11
VOUT/LX shorted to LX current and
Fault switch disabled and system shutdown until fault goes away, VOUT
GND
timing are
monitored.
OVP pin
monitored for
excursions below
20% of OVP
threshold
is checked at start-up with a low current from LX to check for presence of
short before the fault switch is enabled.
Components Selections
According to the inductor Voltage-Second Balance principle,
the change of inductor current during the switching regulator
On time is equal to the change of inductor current during the
switching regulator Off time. Since the voltage across an
inductor is:
Input Capacitor
Switching regulators require input capacitors to deliver peak
charging current and to reduce the impedance of the input
supply. This reduces interaction between the regulator and
input supply, improving system stability. The high switching
frequency of the loop causes almost all ripple current to flow
in the input capacitor, which must be rated accordingly.
V L = L × Δ I L ? Δ t
and Δ I L @ On = Δ I L @ Off, therefore:
( V I – 0 ) ? L × D × t S = ( V O – V D – V I ) ? L × ( 1 – D ) × t S
(EQ. 5)
(EQ. 6)
A capacitor with low internal series resistance should be
chosen to minimize heating effects and improve system
efficiency, such as X5R or X7R ceramic capacitors, which
offer small size and a lower value of temperature and voltage
coefficient compared to other ceramic capacitors.
where D is the switching duty cycle defined by the turn-on
time over the switching period. V D is Schottky diode forward
voltage that can be neglected for approximation.
Rearranging the terms without accounting for V D gives the
boost ratio and duty cycle respectively as:
In boost mode, input current flows continuously into the
inductor, with an AC ripple component proportional to the
rate of inductor charging only and smaller value input
capacitors may be used. It is recommended that an input
capacitor of at least 10μF be used. Ensure the voltage rating
of the input capacitor is suitable to handle the full supply
V O ? V I = 1 ? ( 1 – D )
(EQ. 7)
range.
D = ( V O – V I ) ? V O
14
(EQ. 8)
FN6570.0
May 9, 2008
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